For the purposes of memory bandwidth calculations tile4 should not be considered the same as tileY. Make it so. This should not actually change anything as the affected code only applies to pre-MTL integrated GPUs, which don't have tile4. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260522200346.17377-11-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>