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(I'm so sorry!) Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note *//* Copyright (C) 2018-2025, Advanced Micro Devices, Inc */
#ifndef IONIC_ABI_H#define IONIC_ABI_H
#include <linux/types.h>
#define IONIC_ABI_VERSION 1
#define IONIC_EXPDB_64 1#define IONIC_EXPDB_128 2#define IONIC_EXPDB_256 4#define IONIC_EXPDB_512 8
#define IONIC_EXPDB_SQ 1#define IONIC_EXPDB_RQ 2
#define IONIC_CMB_ENABLE 1#define IONIC_CMB_REQUIRE 2#define IONIC_CMB_EXPDB 4#define IONIC_CMB_WC 8#define IONIC_CMB_UC 16
enum ionic_ctx_resp_comp_mask { IONIC_CTX_CMASK_IONIC_FLAGS = 1 << 0,};
struct ionic_ctx_req { __u32 rsvd[2];};
struct ionic_ctx_resp { __u32 rsvd; __u32 page_shift;
__aligned_u64 dbell_offset;
__u16 version; __u8 qp_opcodes; __u8 admin_opcodes;
__u8 sq_qtype; __u8 rq_qtype; __u8 cq_qtype; __u8 admin_qtype;
__u8 max_stride; __u8 max_spec; __u8 udma_count; __u8 expdb_mask; __u8 expdb_qtypes; __u8 rcq_sign_bit;
__u16 comp_mask; __aligned_u64 phc_offset;};
struct ionic_qdesc { __aligned_u64 addr; __u32 size; __u16 mask; __u8 depth_log2; __u8 stride_log2;};
struct ionic_ah_resp { __u32 ahid; __u32 pad;};
struct ionic_cq_req { struct ionic_qdesc cq[2]; __u8 udma_mask; __u8 rsvd[7];};
struct ionic_cq_resp { __u32 cqid[2]; __u8 udma_mask; __u8 rsvd[7];};
struct ionic_qp_req { struct ionic_qdesc sq; struct ionic_qdesc rq; __u8 sq_spec; __u8 rq_spec; __u8 sq_cmb; __u8 rq_cmb; __u8 udma_mask; __u8 rsvd[3]; __u32 ionic_flags; __u32 rsvd_pad;};
struct ionic_qp_resp { __u32 qpid; __u8 sq_cmb; __u8 rq_cmb; __u8 udma_idx; __u8 rsvd[1]; __aligned_u64 sq_cmb_offset; __aligned_u64 rq_cmb_offset;};
struct ionic_srq_req { struct ionic_qdesc rq; __u8 rq_spec; __u8 rq_cmb; __u8 udma_mask; __u8 rsvd[5];};
struct ionic_srq_resp { __u32 srqid; __u8 rq_cmb; __u8 udma_idx; __u8 rsvd[2]; __aligned_u64 rq_cmb_offset;};
#endif /* IONIC_ABI_H */