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OR-1 dataflow CPU sketch
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or1-design sm_mod.py
365 B · 18 lines
Python
at main
12345678910111213141516171819from dataclasses import dataclassfrom enum import IntEnumfrom typing import List, Optional
class Presence(IntEnum): EMPTY = 0b00 RESERVED = 0b01 FULL = 0b10 WAITING = 0b11
@dataclassclass SMCell(object): pres: Presence data_l: Optional[int] # data or length data_r: Optional[List[int]] # optional data is_wide: bool = False