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logic pro compatible fpga based logic analyzer
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12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061#!/usr/bin/env bash# Build picologic gateware for Icepi Zero# Usage: ./scripts/build.sh [target]# target: synth | pnr | pack | all (default: all)
set -euo pipefail
TOP="gateware.top"LPF="constraints/icepi-zero.lpf"BUILD_DIR="build"DEVICE="25k" # ECP5-25F
mkdir -p "$BUILD_DIR"
TARGET="${1:-all}"
synth() { echo "=== Synthesis ===" python3 -m amaranth.build \ --name picologic \ --type json \ "$TOP" \ -o "$BUILD_DIR/picologic.json"}
pnr() { echo "=== Place & Route ===" nextpnr-ecp5 \ --$DEVICE \ --package CABGA256 \ --json "$BUILD_DIR/top.json" \ --lpf "$BUILD_DIR/top.lpf" \ --textcfg "$BUILD_DIR/top.config" \ --freq 50}
pack() { echo "=== Bitstream Packing ===" ecppack \ --compress \ "$BUILD_DIR/top.config" \ "$BUILD_DIR/top.bit"}
flash() { echo "=== Programming ===" openFPGALoader --fpga-part LFE5U-25F "$BUILD_DIR/top.bit"}
case "$TARGET" in synth) synth ;; pnr) synth; pnr ;; pack) synth; pnr; pack ;; flash) synth; pnr; pack; flash ;; all) synth; pnr; pack ;; *) echo "Unknown target: $TARGET"; exit 1 ;;esac
echo "=== Done ==="ls -la "$BUILD_DIR"/picologic.* 2>/dev/null || true